Various types of non-volatile memory such as NAND memory typically utilize various error correction schemes to search for improved read reference voltages responsive to read errors. Read failures may originate from numerous error mechanisms and different usage models. These error mechanisms and usage models may alter memory cell threshold voltage (Vt) distributions. As a result of altering Vt distributions, it generally helps to move read reference voltage values and retry reading the memory cells. This movement of the read reference is referred to as Moving Read Reference (MRR). However, MRR schemes can involve numerous attempts to move read reference before an Error Correction Code (ECC) correctable read reference is found. In order to prevent a large number of re-reads, an MRR table having a fixed number of entries implemented in a fixed order or sequence may be used. Once all the MRR table entries have been used in the fixed sequence and an ECC correctable read reference is not found, other error recovery schemes may be implemented and/or the memory cell may be deemed as unreadable.